TY - JOUR U1 - Zeitschriftenartikel, wissenschaftlich - begutachtet (reviewed) A1 - Uhlmann, Yannick A1 - Brunner, Michael A1 - Bramlage, Lennart A1 - Scheible, Jürgen A1 - Curio, Cristóbal T1 - Procedural- and reinforcement-learning-based automation methods for analog integrated circuit sizing in the electrical design space JF - Electronics N2 - Analog integrated circuit sizing is notoriously difficult to automate due to its complexity and scale; thus, it continues to heavily rely on human expert knowledge. This work presents a machine learning-based design automation methodology comprising pre-defined building blocks such as current mirrors or differential pairs and pre-computed look-up tables for electrical characteristics of primitive devices. Modeling the behavior of primitive devices around the operating point with neural networks combines the speed of equation-based methods with the accuracy of simulation-based approaches and, thereby, brings quality of life improvements for analog circuit designers using the gm/Id method. Extending this procedural automation method for human design experts, we present a fully autonomous sizing approach. Related work shows that the convergence properties of conventional optimization approaches improve significantly when acting in the electrical domain instead of the geometrical domain. We, therefore, formulate the circuit sizing task as a sequential decision-making problem in the alternative electrical design space. Our automation approach is based entirely on reinforcement learning, whereby abstract agents learn efficient design space navigation through interaction and without expert guidance. These agents’ learning behavior and performance are evaluated on circuits of varying complexity and different technologies, showing both the feasibility and portability of the work presented here. KW - GM over ID KW - analog IC design KW - learning-based design automation KW - machine learning KW - reinforcement learning KW - procedural design automation Y1 - 2023 UN - https://nbn-resolving.org/urn:nbn:de:bsz:rt2-opus4-44966 SN - 2079-9292 SS - 2079-9292 U6 - https://doi.org/10.3390/electronics12020302 DO - https://doi.org/10.3390/electronics12020302 VL - 12 IS - 2 SP - 1 EP - 24 S1 - 24 PB - MDPI CY - Basel ER -