TY  - CHAP
U1  - Konferenzveröffentlichung
A1  - Kiesel, Sebastian
A1  - Kern, Thomas
A1  - Wicht, Bernhard
ED  - Gerfers, Friedel
T1  - A ramped-gate voltage sensing scheme for embedded multilevel flash in automotive
T2  - Analog Workshop 2017 : March 2-3, 2017, Technische Universität Berlin
N2  - Multilevel-cell (MLC) flash is commonly deployed in today’s high density NAND memories, but low latency and high reliability requirements make it barely used in automotive embedded flash applications. This paper presents a time domain voltage sensing scheme that applies a dynamic voltage ramp at the cells’ control gate (CG) in order to achieve fast and reliable sensing suitable for automotive applications.
Y1  - 2017
U6  - https://nbn-resolving.org/urn:nbn:de:bsz:rt2-opus4-17191
UN  - https://nbn-resolving.org/urn:nbn:de:bsz:rt2-opus4-17191
UR  - http://www.msc.tu-berlin.de/analog_workshop_2017/home/
SP  - 11
S1  - 1
PB  - Technische Universität Berlin
CY  - Berlin
ER  -