TY - JOUR U1 - Zeitschriftenartikel, wissenschaftlich - begutachtet (reviewed) A1 - Pfost, Martin A1 - Boianceanu, Cristian A1 - Lascau, Ioana A1 - Simon, Dan-Ionut A1 - Sosin, Sebastian T1 - Influence of the on-chip metallization on self-heating in integrated power technologies JF - IEEE transactions on semiconductor manufacturing N2 - DMOS transistors in integrated power technologies are often subject to significant self-heating and thus high temperatures, which can lead to device failure and reduced lifetime. Hence, it must be ensured that the device temperature does not rise too much. For this, the influence of the on-chip metallization must be taken into account because of the good thermal conductivity and significant thermal capacitance of the metal layers on top of the active DMOS area. In this paper, test structures with different metal layers and vias configurations are presented that can be used to determine the influence of the onchip metallization on the temperature caused by self-heating. It will be shown how accurate results can be obtained to determine even the influence of small changes in the metallization. The measurement results are discussed and explained, showing how on-chip metallization helps to lower the device temperature. This is further supported by numerical simulations. The obtained insights are valuable for technology optimization, but are also useful for calibration of temperature simulators. KW - integrated power technologies KW - metallization KW - power semiconductor devices KW - self-heating KW - temperature measurement Y1 - 2014 SN - 0894-6507 SS - 0894-6507 U6 - https://doi.org/10.1109/TSM.2014.2306683 DO - https://doi.org/10.1109/TSM.2014.2306683 VL - 27 IS - 2 SP - 169 EP - 177 S1 - 9 PB - IEEE CY - New York, NY ER -