TY  - CHAP
U1  - Konferenzveröffentlichung
A1  - Kilian, Martin
A1  - Joos, Joachim
A1  - Wicht, Bernhard
T1  - A 3.6kW efficiency and switching frequency improved DCDC-
converter design with optimized mounting and interconnect
technology
T2  - PCIM Europe 2015 : International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management ; Nuremberg, 19 - 21 May 2015 ; proceedings
N2  - DC-DC-converters are used in many different applications. Specifying the switching frequency is the most important parameter to calculate component costs and required space. Especially automotive applications of small brushed- or brushless dc-motors and the increasing number of DC-DC-converters have high requirements on the structual space (low box volume). This is of particular importance for automotive converters for the new 48 V board net. Multiplying the frequency by two will reduce the size of the power inductor by half at a given specification for output-voltage ripple. Smaller power inductors result in reduced losses due to smaller series resistance and parasitic capacitance. Furthermore a larger switching frequency decreases the size of the DC link capacitors. The circuit will get more idealized. However, as the switching losses increase with frequency, a DC-DC-converter can only benefit from these advantages if the switching behavior can be improved.
This paper presents an optimization method to increase switching slope and switching frequency of a 3.6 kW 3-phase step-up converter by separating the design and layout process into two parts. The first part is the power stage which carries the load current. It contains the power inductance and the drain-source-channel of the power MOSFETs. The second part is the driver circuit which contains the driver ICs, the gate resistor and the gate input impedance. While the switching slope was measured to be improved by 50 % , the switching time decreased by 20 %. Hence, the switching frequency of the step-up converter could be increased from 100 kHz to 200 kHz without loss increase. By mounting the driver ICs in a piggyback configuration in close proximity to the power stage, the parasitics could be further reduced significantly and 500 kHz switching frequency could be achieved with 97.5 % efficiency.
Y1  - 2015
UR  - http://ieeexplore.ieee.org/xpl/abstractAuthors.jsp?reload=true&arnumber=7149062
SN  - 978-3-8007-3924-0
SB  - 978-3-8007-3924-0
SP  - 421
EP  - 428
S1  - 8
PB  - VDE Verlag
CY  - Berlin
ER  -