TY  - CHAP
U1  - Konferenzveröffentlichung
A1  - Weber, Lukas
A1  - Sommer, Lukas
A1  - Solis-Vasquez, Leonardo
A1  - Vinçon, Tobias
A1  - Knödler, Christian
A1  - Bernhardt, Arthur
A1  - Petrov, Ilia
A1  - Koch, Andreas
T1  - Framework for the automatic generation of FPGA-based Near-Data Processing accelerators in smart storage systems
T2  - IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 17-21 June 2021, Portland, USA, proceedings
N2  - Near-Data Processing is a promising approach to overcome the limitations of slow I/O interfaces in the quest to analyze the ever-growing amount of data stored in database systems. Next to CPUs, FPGAs will play an important role for the realization of functional units operating close to data stored in non-volatile memories such as Flash.It is essential that the NDP-device understands formats and layouts of the persistent data, to perform operations in-situ. To this end, carefully optimized format parsers and layout accessors are needed. However, designing such FPGA-based Near-Data Processing accelerators requires significant effort and expertise. To make FPGA-based Near-Data Processing accessible to non-FPGA experts, we will present a framework for the automatic generation of FPGA-based accelerators capable of data filtering and transformation for key-value stores based on simple data-format specifications.The evaluation shows that our framework is able to generate accelerators that are almost identical in performance compared to the manually optimized designs of prior work, while requiring little to no FPGA-specific knowledge and additionally providing improved flexibility and more powerful functionality.
KW  - FPGA
KW  - Near-Data Processing
KW  - automatic generation
KW  - key-value store
KW  - database
KW  - COSMOS
KW  - OpenSSD
Y1  - 2021
U6  - https://doi.org/10.1109/IPDPSW52791.2021.00028
DO  - https://doi.org/10.1109/IPDPSW52791.2021.00028
SP  - 136
EP  - 143
S1  - 8
PB  - IEEE
CY  - Piscataway, NJ
ER  -