TY - JOUR U1 - Zeitschriftenartikel, wissenschaftlich - begutachtet (reviewed) A1 - Wittmann, Jürgen A1 - Seidel, Achim A1 - Wicht, Bernhard T1 - Efficiency modeling for MHz DCDC converters at 40V input voltage range JF - Advances in radio science : Kleinheubacher Berichte N2 - Size and cost of a switched mode power supply can be reduced by increasing the switching frequency. This leads especially at a high input voltage to a decreasing efficiency caused by switching losses. Conventional calculations are not suitable to predict the efficiency as parasitic capacitances have a significant loss contribution. This paper presents an analytical efficiency model which considers parasitic capacitances separately and calculates the power loss contribution of each capacitance to any resistive element. The proposed model is utilized for efficiency optimization of converters with switching frequencies >10MHz and input voltages up to 40V. For experimental evaluation a DCDC converter was manufactured in a 180 nm HV BiCMOS technology. The model matches a transistor level simulation and measurement results with an accuracy better than 3.5 %. The accuracy of the parasitic capacitances of the high voltage transistor determines the overall accuracy of the efficiency model. Experimental capacitor measurements can be fed into the model. Based on the model, different architectures have been studied. Y1 - 2014 UN - https://nbn-resolving.org/urn:nbn:de:bsz:rt2-opus4-4234 SN - 1684-9965 SS - 1684-9965 U6 - https://doi.org/10.5194/ars-12-111-2014 DO - https://doi.org/10.5194/ars-12-111-2014 VL - 12 SP - 111 EP - 115 S1 - 6 PB - Copernicus CY - Darmstadt ER -