TY  - CHAP
U1  - Konferenzveröffentlichung
A1  - Wittmann, Jürgen
A1  - Rindfleisch, Christoph
A1  - Wicht, Bernhard
ED  - Sin, Johnny
T1  - Substrate coupling in fast-switching integrated power stages
T2  - 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD) ; date: 10 - 14 May 2015
N2  - Substrate coupling is a critical failure mechanism especially in fast-switching integrated power stages controlling high-side NMOS power FETs. The parasitic coupling across the substrate in integrated power stages at rise times of up to 500 ps and input voltages of up to 40V is investigated in this paper. The coupling has been studied for the power stage of an integrated buck converter. In particular, dedicated diverting and isolation structures against substrate coupling are analyzed by simulations and evaluated with measurements from test chips in 180nm high-voltage BiCMOS. The results are compared regarding effectiveness, area as well as implementation effort and cost. Back-side metalization shows superior characteristics with nearly 100% noise suppression. Readily available p-guard ring structures bring 75% disturbance reduction. The results are applicable to advanced and future power management solutions with fully integrated switched-mode power supplies at switching frequencies >10 MHz.
Y1  - 2015
SN  - 978-1-4799-6261-7
SB  - 978-1-4799-6261-7
U6  - https://doi.org/10.1109/ISPSD.2015.7123459
DO  - https://doi.org/10.1109/ISPSD.2015.7123459
SP  - 341
EP  - 344
S1  - 4
PB  - IEEE
CY  - Piscataway, NJ
ER  -