PUL: Pre-load in Software for caches wouldn't always play along
- Memory latencies and bandwidth are major factors, limiting system performance and scalability. Modern CPUs aim at hiding latencies by employing large caches, out-of-order execution, or complex hardware prefetchers. However, software-based prefetching exhibits higher efficiency, improving with newer CPU generations. In this paper we investigate software-based, post-Moore systems that offload operations to intelligent memories. We show that software-based prefetching has even higher potential in near-data processing settings by maximizing compute utilization through compute/IO interleaving.
| Author of HS Reutlingen | Petrov, Ilia |
|---|---|
| DOI: | https://doi.org/10.1007/978-3-032-05281-0_4 |
| ISBN: | 978-3-032-05280-3 |
| ISBN: | 978-3-032-05281-0 |
| Published in: | Advances in Databases and Information Systems : 29th European Conference, ADBIS 2025, Tampere, Finland, September 23–26, 2025, proceedings (Lecture notes in Computer Science; 16043) |
| Publisher: | Springer |
| Place of publication: | Berlin |
| Editor: | Panos Chrysanthis, Kjetil Nørvåg, Kostas Stefanidis, Zheying Zhang |
| Document Type: | Conference proceeding |
| Language: | German |
| Publication year: | 2025 |
| Tag: | Near Data Processing; Processing-in-Memory; pre-fetching; pre-loading |
| Page Number: | 16 |
| First Page: | 44 |
| Last Page: | 59 |
| PPN: | Im Katalog der Hochschule Reutlingen ansehen |
| DDC classes: | 004 Informatik |
| Open access?: | Nein |
| Licence (German): |  In Copyright - Urheberrechtlich geschützt |
