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Characterization and modeling of self-heating in DMOS transistors

  • Advanced power semiconductors such as DMOS transistors are key components of modern power electronic systems. Recent discrete and integrated DMOS technologies have very low area-specific on-state resistances so that devices with small sizes can be chosen. However, their power dissipation can sometimes be large, for example in fault conditions, causing the device temperature to rise significantly. This can lead to excessive temperatures, reduced lifetime, and possibly even thermal runaway and subsequent destruction. Therefore, it is required to ensure already in the design phase that the temperature always remains in an acceptable range. This paper will show how self-heating in DMOS transistors can be experimentally determined with high accuracy. Further, it will be discussed how numerical electrothermal simulations can be carried out efficiently, allowing the accurate assessment of self-heating within a few minutes. The presented approach has been successfully verified experimentally for device temperatures exceeding 500 ◦C up to the onset of thermal runaway.

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Metadaten
Name:Pfost, Martin
DOI:https://doi.org/10.1109/SMICND.2014.6966378
ISBN:978-1-4799-3916-9
Published in (German):International Semiconductor Conference (CAS), 2014 : 13 - 15 Oct. 2014, Sinaia, Romania
Publisher:IEEE
Place of publication:Piscataway, NJ
Document Type:Conference Proceeding
Language:English
Year of Publication:2014
Tag:numerical analysis; semiconductor device models; semiconductor device reliability
Pagenumber:8
First Page:3
Last Page:10
Dewey Decimal Classification:620 Ingenieurwissenschaften und Maschinenbau
Open Access:Nein
Licence (German):License Logo  Lizenzbedingungen IEEE