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A self-organization approach for layout floorplanning problems in analog IC design

  • In analog layout design, chip floorplans are usually still handcrafted by human experts. Particularly, the nondiscrete variability of block dimensions must be exploited thereby, which is a serious challenge for optimization-based algorithmic floorplanners. This paper presents a fundamentally new automation approach based on self-organization, in which floorplan blocks can autonomously move, rotate and deform themselves to jointly let compact results emerge from a synergistic flow of interaction. Our approach is able to minimize area and wirelength, supports nonslicing floorplan structures, can consider fully variable block dimensions, accounts for a fixed rectilinear boundary, and works absolutely deterministic. The approach is innovatively different from conventional, top-down oriented floorplanning algorithms.

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Metadaten
Name:Marolt, Daniel; Scheible, Jürgen
DOI:https://doi.org/10.1109/PRIME.2016.7519454
ISBN:so978- 1-5090-0493-5
Erschienen in:12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) : 27- 30 June 2016, Lisbon, Portugal
Publisher:IEEE
Place of publication:Piscataway, NJ
Document Type:Conference Proceeding
Language:English
Year of Publication:2016
Pagenumber:4
Dewey Decimal Classification:620 Ingenieurwissenschaften und Maschinenbau
Open Access:Nein
Licence (German):License Logo  Lizenzbedingungen IEEE