Machine learning based procedural circuit sizing and DC operating point prediction
- This paper presents a machine learning powered, procedural sizing methodology based on pre-computed look-up tables containing operating point characteristics of primitive devices. Several Neural Networks are trained for 90nm and 45nm technologies, mapping different electrical parameters to the corresponding dimensions of a primitive device. This transforms the geometric sizing problem into the domain of circuit design experts, where the desired electrical characteristics are now inputs to the model. Analog building blocks or entire circuits are expressed as a sequence of model evaluations, capturing the sizing strategy and intention of the designer in a procedure, which is reusable across different technology nodes. The methodology is employed for the sizing of two operational amplifiers, and evaluated for two technology nodes, showing the versatility and efficiency of this approach.
| Author of HS Reutlingen | Uhlmann, Yannick; Essich, Michael; Schweikardt, Matthias; Scheible, Jürgen; Curio, Cristóbal |
|---|---|
| URL: | https://ieeexplore.ieee.org/document/9547948 |
| ISBN: | 978-3-8007-5588-2 |
| Erschienen in: | SMACD / PRIME 2021 : International Conference on SMACD and 16th Conference on PRIME; 19-22 July 2021, online, proceedings |
| Publisher: | VDE |
| Place of publication: | Berlin |
| Document Type: | Conference proceeding |
| Language: | English |
| Publication year: | 2021 |
| Tag: | analog ic sizing; gm over id; machine learning; neural networks |
| Page Number: | 4 |
| First Page: | 188 |
| Last Page: | 191 |
| DDC classes: | 620 Ingenieurwissenschaften und Maschinenbau |
| Open access?: | Nein |
| Licence (German): |  In Copyright - Urheberrechtlich geschützt |
