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NVMulator: a configurable open-source non-volatile memory emulator for FPGAs

  • Near-Data Processing (NDP) is a key computing paradigm for reducing the ever growing time and energy costs of data transport versus computations. With their flexibility, FPGAs are an especially suitable compute element for NDP scenarios. Even more promising is the exploitation of novel and future non-volatile memory (NVM) technologies for NDP, which aim to achieve DRAM-like latencies and throughputs, while providing large capacity non-volatile storage. Experimentation in using FPGAs in such NVM-NDP scenarios has been hindered, though, by the fact that the NVM devices/FPGA boards are still very rare and/or expensive. It thus becomes useful to emulate the access characteristics of current and future NVMs using off-the-shelf DRAMs. If such emulation is sufficiently accurate, the resulting FPGA-based NDP computing elements can be used for actual full-stack hardware/software benchmarking, e.g., when employed to accelerate a database. For this use, we present NVMulator, an open-source easy-to-use hardware emulation module that can be seamlessly inserted between the NDP processing elements on the FPGA and a conventional DRAM-based memory system. We demonstrate that, with suitable parametrization, the emulated NVM can come very close to the performance characteristics of actual NVM technologies, specifically Intel Optane. We achieve 0.62% and 1.7% accuracy for cache line sized accesses for read and write operations, while utilizing only 0.54% of LUT logic resources on a Xilinx/AMD AU280 UltraScale+ FPGA board. We consider both file-system as well as database access patterns, examining the operation of the RocksDB database when running on real or emulated Optane-technology memories.

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Metadaten
Author of HS ReutlingenPetrov, Ilia; Bernhardt, Arthur
DOI:https://doi.org/10.1007/978-3-031-42921-7_3
ISBN:978-3-031-42920-0
ISBN:978-3-031-42921-7
ISSN:0302-9743
Erschienen in:Applied reconfigurable computing : Architectures, tools, and applications; 19th International Symposium, ARC 2023, Cottbus, Germany, September 27-29, 2023, proceedings (LNCS ; 14251)
Publisher:Springer
Place of publication:Cham
Document Type:Conference proceeding
Language:English
Publication year:2023
Tag:FPGA; emulator; non-volatile memory
Page Number:16
First Page:35
Last Page:50
PPN:Im Katalog der Hochschule Reutlingen ansehen
DDC classes:004 Informatik
Open access?:Nein
Licence (German):License Logo  In Copyright - Urheberrechtlich geschützt