Volltext-Downloads (blau) und Frontdoor-Views (grau)

A PCB-based MLCC capacitor assembly with reduced parasitics for applications requiring low-ripple and low-impedance

  • This paper introduces a capacitor assembly designed using multilayer ceramic capacitors (MLCCs) mounted on a printed circuit board (PCB), for power electronics applications operating at voltages of up to 500 V. The design creates a low impedance capacitor network that minimizes both equivalent series resistance and equivalent series inductance. This leads to improvements for applications that require capacitors with low voltage ripple and low impedance, such as DC-link commutation capacitors, flying capacitor circuits, and output filters. The capacitor board is built by paralleling standard MLCCs, using a layout that ensures uniform current distribution and reduces parasitics. Compared to standard film capacitors, a reduction in parasitic impedance by a factor of more than 10 is achieved while maintaining a compact form factor. Simulation results and prototype measurements validate the design approach and demonstrate its feasibility.

Download full text files

  • 6320.pdf
    eng

Export metadata

Additional Services

Search Google Scholar

Statistics

frontdoor_oas
Metadaten
Author of HS ReutlingenUlrich, Burkhard; Maier, Jannik
DOI:https://doi.org/10.1109/APEC51134.2026.11516934
ISBN:979-8-3315-7544-1
Published in:2026 IEEE Applied Power Electronics Conference and Exposition (APEC)
Publisher:IEEE
Place of publication:Piscataway, NJ
Document Type:Conference proceeding
Language:English
Publication year:2026
Contributing Corporation / Conference:2026 IEEE Applied Power Electronics Conference and Exposition (APEC) (San Antonio, TX, USA)
Page Number:7
First Page:2828
Last Page:2834
DDC classes:621 Angewandte Physik
Open access?:Nein
Licence (German):License Logo  In Copyright - Urheberrechtlich geschützt