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To date, special interest has been paid to composite scaffolds based on polymers enriched with hydroxyapatite (HA). However, the role of HA containing different trace elements such as silicate in the structure of a polymer scaffold has not yet been fully explored. Here, we report the potential use of silicate-containing hydroxyapatite (SiHA) microparticles and microparticle aggregates in the predominant range from 2.23 to 12.40 μm in combination with polycaprolactone (PCL) as a hybrid scaffold with randomly oriented and well-aligned microfibers for regeneration of bone tissue. Chemical and mechanical properties of the developed 3D scaffolds were investigated with XRD, FTIR, EDX and tensile testing. Furthermore, the internal structure and surface morphology of the scaffolds were analyzed using synchrotron X-ray μCT and SEM. Upon culturing human mesenchymal stem cells (hMSC) on PCL-SiHA scaffolds, we found that both SiHA inclusion and microfiber orientation affected cell adhesion. The best hMSCs viability was revealed at 10 day for the PCL-SiHA scaffolds with well-aligned structure (~82%). It is expected that novel hybrid scaffolds of PCL will improve tissue ingrowth in vivo due to hydrophilic SiHA microparticles in combination with randomly oriented and well-aligned PCL microfibers, which mimic the structure of extracellular matrix of bone tissue.
For a holistic assessment of the interaction between the human body and tight fitted clothing, it is necessary to consider the mechanical properties of the body. Default avatars in CAD software are usually solid and do not take this interaction into account. For this purpose, a solid avatar is converted to a deformable one by using the soft body physics implementation in the simulation program Blender. The fit of a 3D garment on both avatars are compared, which allows a first evaluation of the differences between these approaches.
Lehr- und Übungsbuch sowie Nachschlagewerk zur CAD-Software Creo Parametric und zu den Grundlagen der Produktdatenverwaltung mit Windchill. Vermittelt werden die Volumenmodellierung, die 3D Flächenmodellierung, die Blechmodellierung, die Baugruppen- und Zeichnungserstellung, das Erstellen von Animationen, die Definition und Anwendung kinematischer sowie dynamischer Analysen und die Definition von Baugruppen, die Konstruktionsvarianten "Top-Down" und "Bottom-Up" sowie die Organisation von Konstruktionsprojekten über Skelett Techniken.
Weiter werden die Grundlagen des Produktdatenmanagements im Konstruktionsbereich unter Windchill vermittelt. Alle Verfahren werden handlungsorientiert an einem weitgehend durchgehenden Modellierungsprojekt erarbeitet. Aufgrund des ausführlichen Inhalts- und Sachwortverzeichnisses sowie einer Vielzahl an Bildern ist das Buch als Grundlage für Vorlesungen, Schulungen oder Praktika und insbesondere auch zum Selbststudium sowie als Nachschlagewerk geeignet.
Lehrbuch zur CAD-Software Creo Parametric und zur Produktdatenverwaltung mit Windchill.
3D-Volumenmodellierung, 3D-Flächenmodellierung, Blechmodellierung, Baugruppen- und Zeichnungserstellung, Definition von Normteilen, Erstellen von Animationen und dynamischen Analysen.
Verfahren zum Umgang mit großen Baugruppen und zur flexiblen Modellierung, Konstruk-tionsvarianten "Top-Down" und "Bottom-Up", Organisation von Konstruktionsprojekten über Skeletttechnik.
Neu: Konstruktion von und mit Mehrkörperobjekten, Rahmenkonstruktion in der Profilumgebung (AFX), intelligente Verbindungen (IFX), Live Simulation und Generatives Design.
Viele Unternehmen befassen sich in jüngster Zeit mit der Nutzung von Social Media für die interne Kommunikation und Zusammenarbeit. So genannte Enterprise Social Networks bieten integrierte Plattformen mit Profilen, Blogs, Gruppen- und Kommentarfunktionen für die unternehmensinterne Anwendung. Sehr häufig sind damit umfangreiche Investitionen verbunden. Die Budgets werden im Kern für die IT verwendet, "weiche Faktoren" bleiben häufig außen vor. Ein schwerer Fehler, wie aktuelle Marktstudien zeigen. Etliche der ambitionierten Projekte drohen daher zu scheitern.
The digitization of factories will be a significant issue for the 2020s. New scenarios are emerging to increase the efficiency of production lines inside the factory, based on a new generation of robots’ collaborative functions. Manufacturers are moving towards data-driven ecosystems by leveraging product lifecycle data from connected goods. Energy-efficient communication schemes, as well as scalable data analytics, will support these various data collection scenarios. With augmented reality, new remote services are emerging that facilitate the efficient sharing of knowledge in the factory. Future communication solutions should generally ensure connectivity between the various production sites spread worldwide and new players in the value chain (e.g., suppliers, logistics) transparent, real-time, and secure. Industry 4.0 brings more intelligence and flexibility to production. Resulting in more lightweight equipment and, thus, offering better ergonomics. 5G will guarantee real-time transmissions with latencies of less than 1 ms. This will provide manufacturers with new possibilities to collect data and trigger actions automatically.
Hochschulabsolventen sind für Unternehmen eine der wichtigsten Quellen für die Nachwuchsrekrutierung. Doch wie erreichen Sie die jungen Studenten am Besten? Eine bloße Ausschreibung einer Stelle auf der Unternehmenswebseite reicht nicht mehr aus. Wir zeigen Ihnen, wie Sie bereits vor dem Bewerbungsprozess in der Lebenswirklichkeit (Relevant Set) der Studierenden präsent werden, um überhaupt als Arbeitgeber in Betracht gezogen zu werden.
More and more power electronics applications utilize GaN transistors as they enable higher switching frequencies in comparison to conventional Si devices. Faster switching shrinks down the size of passives and enables compact solutions in applications like renewable energy, electrical cars and home appliances. GaN transistors benefit from ~10× smaller gate charge QG and gate drive voltages in the range of typically 5V vs. ~15V for Si.
An integrated synchronous buck converter with a high resolution dead time control for input voltages up to 48V and 10MHz switching frequency is presented. The benefit of an enhanced dead time control at light loads to enable zero voltage switching at both the high-side and low-side switch at low output load is studied. This way, compact multi-MHz DCDC converters can be implemented at high efficiency over a wide load current range. The concept also eliminates body diode forward conduction losses and minimizes reverse recovery losses. A dead time resolution of 125 ps is realized by an 8-bit differential delay chain. A further efficiency enhancement by soft switching at the high-side switch at light load is achieved with a voltage boost of the switching node by dead time control in forced continuous conduction mode. The monolithic converter is implemented in an 180nm high-voltage BiCMOS technology. At V IN = 48V, V OUT = 5V, 50mA load, 10MHz switching frequency and 500 nH output inductance, the efficiency is measured to be increased by 14.4% compared to a conventional predictive dead time control. A peak efficiency of 80.9% is achieved at 12V input.
In recent years, significant progress has been made on switched-capacitor DC-DC converters as they enable fully integrated on-chip power management. New converter topologies overcame the fixed input-to-output voltage limitation and achieved high efficiency at high power densities. SC converters are attractive to not only mobile handheld devices with small input and output voltages, but also for power conversion in IoE, industrial and automotive applications, etc. Such applications need to be capable of handling widely varying input voltages of more than 10V, which requires a large amount of conversion ratios. The goal is to achieve a fine granularity with the least number of flying capacitors. In [1] an SC converter was introduced that achieves these goals at low input voltage VIN ≤ 2.5V. [2] shows good efficiency up to VIN = 8V while its conversion ratio is restricted to ≤1/2 with a limited, non-equidistant number of conversion steps. A particular challenge arises with increasing input voltage as several loss mechanisms like parasitic bottom-plate losses and gate-charge losses of high-voltage transistors become of significant influence. High input voltages require supporting circuits like level shifters, auxiliary supply rails etc., which allocate additional area and add losses [2-5]. The combination of both increasing voltage and conversion ratios (VCR) lowers the efficiency and the achievable output power of SC converters. [3] and [5] use external capacitors to enable higher output power, especially for higher VIN. However, this is contradictory to the goal of a fully integrated power supply.
The presented wide-Vin step-down converter introduces a parallel-resonant converter (PRC), comprising an integrated 5-bit capacitor array and a 300 nH resonant coil, placed in parallel to a conventional buck converter. Unlike conventional resonant concepts, the implemented soft-switching control eliminates input voltage dependent losses over a wide operating range. This ensures high efficiency across a wide range of Vin= 12-48V, 100-500mA load and 5V output at up to 15MHz switching frequency. The peak efficiency of the converter is 76.3 %. Thanks to the low output current ripple, the output capacitor can be as small as 50 nF, while the inductor tolerates a larger ESR, resulting in small component size. The proposed PRC architecture is also suitable for future power electronics applications using fast-switching GaN devices.
The power supply is one of the major challenges for applications like internet of things IoTs and smart home. The maintenance issue of batteries and the limited power level of energy harvesting is addressed by the integrated micro power supply presented in this paper. Connected to the 120/230 Vrms mains, which is one of the most reliable energy sources and anywhere indoor available, it provides a 3.3V DC output voltage. The micro power supply consists of a fully integrated ACDC and DCDC converter with one external low voltage SMD buffer capacitor. The micro power supply is fabricated in a low cost 0.35 μm 700 V CMOS technology and covers a die size of 7.7 mm². The use of only one external low voltage SMD capacitor, results in an extremely compact form factor. The ACDC is a direct coupled, full wave rectifier with a subsequent bipolar shunt regulator, which provides an output voltage around 17 V. The DCDC stage is a fully integrated 4:1 SC DCDC converter with an input voltage as high as 17 V and a peak efficiency of 45 %. The power supply achieves an overall output power of 3 mW, resulting in a power density of 390 μW/mm². This exceeds prior art by a factor of 11.
This paper presents an integrated synchronous buck converter for input voltages >12V with 10MHz switching frequency. The converter comprises a predictive dead time control with frequency compensated sampling of the switching node which does not require body diode forward conduction. A high dead time resolution of 125 ps is achieved by a differential delay chain with 8-bit resolution. This way, the efficiency of fast switching DCDC converters can be optimized by eliminating the body diode forward conduction losses, minimizing reverse recovery losses and by achieving zero voltage switching at turn off. The converter was implemented in a 180nm high-voltage BiCMOS technology. The power losses were measured to be reduced by 30%by the proposed dead time control, which results in a 6% efficiency increase at VOUT = 5V and 0.2A load. The peak efficiency is 81 %.
A 20 V, 8 MHz resonant DCDC converter with predictive control for 1 ns resolution soft-switching
(2015)
Fast switching power supplies allow to reduce the size and cost of external passive components. However, the capacitive switching losses of the power stage will increase and become the dominant part of the total losses. Therefore, resonant topologies are the known key to reduce the losses of the power stage. A power switch with an additional resonant circuit can be turned on under soft-switching conditions, ideally with zero-voltage-switching (ZVS). As conventional resonant converts are only efficient for a constant load, this paper presents a predictive regulation loop to approach soft-switching conditions under varying load and component tolerances. A sample and hold based detection circuit is utilized to control the turn-on of the power switch by a digital regulation. The proposed design was fabricated in a 180 nm high-voltage BiCMOS technology. The efficiency of the converter was measured to be increased by up to 16 % vs. worst case timing and by 13 % compared to a conventional hard-switching buck converter at 20 V input voltage and at approximately 8 MHz switching frequency.
DC-DC-converters are used in many different applications. Specifying the switching frequency is the most important parameter to calculate component costs and required space. Especially automotive applications of small brushed- or brushless dc-motors and the increasing number of DC-DC-converters have high requirements on the structual space (low box volume). This is of particular importance for automotive converters for the new 48 V board net. Multiplying the frequency by two will reduce the size of the power inductor by half at a given specification for output-voltage ripple. Smaller power inductors result in reduced losses due to smaller series resistance and parasitic capacitance. Furthermore a larger switching frequency decreases the size of the DC link capacitors. The circuit will get more idealized. However, as the switching losses increase with frequency, a DC-DC-converter can only benefit from these advantages if the switching behavior can be improved.
This paper presents an optimization method to increase switching slope and switching frequency of a 3.6 kW 3-phase step-up converter by separating the design and layout process into two parts. The first part is the power stage which carries the load current. It contains the power inductance and the drain-source-channel of the power MOSFETs. The second part is the driver circuit which contains the driver ICs, the gate resistor and the gate input impedance. While the switching slope was measured to be improved by 50 % , the switching time decreased by 20 %. Hence, the switching frequency of the step-up converter could be increased from 100 kHz to 200 kHz without loss increase. By mounting the driver ICs in a piggyback configuration in close proximity to the power stage, the parasitics could be further reduced significantly and 500 kHz switching frequency could be achieved with 97.5 % efficiency.
A 3D face modelling approach for pose-invariant face recognition in a human-robot environment
(2017)
Face analysis techniques have become a crucial component of human-machine interaction in the fields of assistive and humanoid robotics. However, the variations in head-pose that arise naturally in these environments are still a great challenge. In this paper, we present a real-time capable 3D face modelling framework for 2D in-the-wild images that is applicable for robotics. The fitting of the 3D Morphable Model is based exclusively on automatically detected landmarks. After fitting, the face can be corrected in pose and transformed back to a frontal 2D representation that is more suitable for face recognition. We conduct face recognition experiments with non-frontal images from the MUCT database and uncontrolled, in the wild images from the PaSC database, the most challenging face recognition database to date, showing an improved performance. Finally, we present our SCITOS G5 robot system, which incorporates our framework as a means of image pre-processing for face analysis.
A high-voltage replica based current sensor is presented, along with challenges and design techniques which are rarely discussed in literature so far. The performance is evaluated by detailed small signal and large signal analysis. By dedicated placing of high-voltage cascode devices, while keeping as many low-voltage devices as possible, a high gain-bandwidth product is achieved. A decoupling and biasing circuit is introduced which improves the response time of the current sensor at on/off transitions by a factor of five. The current sensor is implemented in a 180nm HV BiCMOS technology. The sensor achieves a DC loop gain of 83 dB and a gain-bandwidth product of 7 MHz. With the proposed techniques, the gain-bandwidth product is increased by a factor of six. The measurable current range is between 60mA and 1.5 A. The performance is demonstrated in a 500 kHz buck converter at an input voltage of 40V. The overall circuit concept is suitable for 100V and beyond, enabling high performance power management designs including switched mode power supplies and motor applications.
This paper presents a wide-Vin step-down parallel-resonant converter (PRC), comprising an integrated 5-bit capacitor array and a 300-nH resonant coil, placed in parallel to a conventional buck converter. Soft-switching resonant converters are beneficial for high-Vin multi-MHz converters to reduce dominant switching losses, enabling higher switching frequencies. The output filter inductor is optimized based on an empirical study of available inductors. The study shows that faster switching significantly reduces not only the inductor value but also volume, price, and even the inductor losses. In addition, unlike conventional resonant concepts, soft-switching control as part of the proposed PRC eliminates input voltage-dependent losses over a wide operating range, resulting in 76.3% peak efficiency. At Vin = 48 V, a loss reduction of 35% is achieved compared with the conventional buck converter. Adjusting an integrated capacitor array, and selecting the number of oscillation periods, keeps the switching frequency within a narrow range. This ensures high efficiency across a wide range of Vin = 12–48 V, 100–500-mA load, and 5-V output at up to 25-MHz switching frequency. Thanks to the low output current ripple, the output capacitor can be as small
as 50 nF.
Size and cost of a switched mode power supply can be reduced by increasing the switching frequency. The maximum switching frequency and the maximum input voltage range, respectively, is limited by the minimum propagated on-time pulse, which is mainly determined by the level shifter speed. At switching frequencies above 10 MHz, a voltage conversion with an input voltage range up to 50 V and output voltages below 5 V requires an on-time of a pulse width modulated signal of less than 5 ns. This cannot be achieved with conventional level shifters. This paper presents a level shifter circuit, which controls an NMOS power FET on a high-voltage domain up to 50 V. The level shifter was implemented as part of a DCDC converter in a 180 nm BiCMOS technology. Experimental results confirm a propagation delay of 5 ns and on-time pulses of less than 3 ns. An overlapping clamping structure with low parasitic capacitances in combination with a high-speed comparator makes the level shifter also very robust against large coupling currents during high-side transitions as fast as 20 V/ns, verified by measurements. Due to the high dv/dt, capacitive coupling currents can be two orders of magnitude larger than the actual signal current. Depending on the conversion ratio, the presented level shifter enables an increase of the switching frequency for multi-MHz converters towards 100 MHz. It supports high input voltages up to 50 V and it can be applied also to other high-speed applications.