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An integrated synchronous buck converter with a high resolution dead time control for input voltages up to 48V and 10MHz switching frequency is presented. The benefit of an enhanced dead time control at light loads to enable zero voltage switching at both the high-side and low-side switch at low output load is studied. This way, compact multi-MHz DCDC converters can be implemented at high efficiency over a wide load current range. The concept also eliminates body diode forward conduction losses and minimizes reverse recovery losses. A dead time resolution of 125 ps is realized by an 8-bit differential delay chain. A further efficiency enhancement by soft switching at the high-side switch at light load is achieved with a voltage boost of the switching node by dead time control in forced continuous conduction mode. The monolithic converter is implemented in an 180nm high-voltage BiCMOS technology. At V IN = 48V, V OUT = 5V, 50mA load, 10MHz switching frequency and 500 nH output inductance, the efficiency is measured to be increased by 14.4% compared to a conventional predictive dead time control. A peak efficiency of 80.9% is achieved at 12V input.
Die zunehmende erneuerbare Stromerzeugung erfordert Anstrengungen, um den damit verbundenen Angebotsschwankungen und der zusätzlichen Netzbelastung entgegen zu wirken. Eine dezentrale und am Bedarf orientierte Stromerzeugung mittels Kraft-Wärme-Kopplung (KWK) kann hier einen wesentlichen Beitrag leisten, um eine sichere und konstante Stromversorgung zu gewährleisten und die Netze zu entlasten. Zu diesem Zweck ist jedoch ein Steuerungssystem erforderlich, das die KWK-Anlagen in die Lage versetzt, sowohl die Deckung des Wärmebedarfs im Objekt aufrecht zu erhalten, als auch die elektrische Energie genau zu den Zeiten zu erzeugen, in denen sie benötigt wird. Die Entkopplung von Stromerzeugung und Deckung des Wärmebedarfs kann dabei über den standardmäßig vorhandenen Wärmespeicher erfolgen. Dieser stellt damit das zentrale Element der Gesamtanlage dar, für die das Steuerungssystem zur Eigenstromoptimierung im Rahmen des Forschungsvorhabens entwickelt und erprobt wurde.
In recent years, significant progress has been made on switched-capacitor DC-DC converters as they enable fully integrated on-chip power management. New converter topologies overcame the fixed input-to-output voltage limitation and achieved high efficiency at high power densities. SC converters are attractive to not only mobile handheld devices with small input and output voltages, but also for power conversion in IoE, industrial and automotive applications, etc. Such applications need to be capable of handling widely varying input voltages of more than 10V, which requires a large amount of conversion ratios. The goal is to achieve a fine granularity with the least number of flying capacitors. In [1] an SC converter was introduced that achieves these goals at low input voltage VIN ≤ 2.5V. [2] shows good efficiency up to VIN = 8V while its conversion ratio is restricted to ≤1/2 with a limited, non-equidistant number of conversion steps. A particular challenge arises with increasing input voltage as several loss mechanisms like parasitic bottom-plate losses and gate-charge losses of high-voltage transistors become of significant influence. High input voltages require supporting circuits like level shifters, auxiliary supply rails etc., which allocate additional area and add losses [2-5]. The combination of both increasing voltage and conversion ratios (VCR) lowers the efficiency and the achievable output power of SC converters. [3] and [5] use external capacitors to enable higher output power, especially for higher VIN. However, this is contradictory to the goal of a fully integrated power supply.
A highly integrated synchronous buck converter with a predictive dead time control for input voltages >18 V with 10 MHz switching frequency is presented. A high resolution dead time of ˜125 ps allows to reduce dead time dependent losses without requiring body diode conduction to evaluate the dead time. High resolution is achieved by frequency compensated sampling of the switching node and by an 8 bit differential delay chain. Dead time parameters are derived in a comprehensive study of dead time depended losses. This way, the efficiency of fast switching DC-DC converters can be optimized by eliminating the body diode forward conduction losses, minimizing reverse recovery losses and by achieving zero voltage switching. High-speed circuit blocks for fast switching operation are presented including level shifter, gate driver, PWM generator. The converter has been implemented in a 180 nm high-voltage BiCMOS technology.
The power supply is one of the major challenges for applications like internet of things IoTs and smart home. The maintenance issue of batteries and the limited power level of energy harvesting is addressed by the integrated micro power supply presented in this paper. Connected to the 120/230 Vrms mains, which is one of the most reliable energy sources and anywhere indoor available, it provides a 3.3V DC output voltage. The micro power supply consists of a fully integrated ACDC and DCDC converter with one external low voltage SMD buffer capacitor. The micro power supply is fabricated in a low cost 0.35 μm 700 V CMOS technology and covers a die size of 7.7 mm². The use of only one external low voltage SMD capacitor, results in an extremely compact form factor. The ACDC is a direct coupled, full wave rectifier with a subsequent bipolar shunt regulator, which provides an output voltage around 17 V. The DCDC stage is a fully integrated 4:1 SC DCDC converter with an input voltage as high as 17 V and a peak efficiency of 45 %. The power supply achieves an overall output power of 3 mW, resulting in a power density of 390 μW/mm². This exceeds prior art by a factor of 11.
Der Wärmespeicher einer KWK-Anlage kann genutzt werden, um den Betrieb des BHKWs in die Zeiten des Stromverbrauchs zu verlagern. Die Ad-hoc-Zuschaltfunktion verbessert das Ergebnis gegenüber eines auf Basis von Prognosen erstellten Fahrplans. Zu beachten sind allerdings eine erhöhte Anzahl BHKW-Starts und erhöhte Wärmeverluste am Speicher. Die deutlich besten Ergebnisse werden für BHKW mit Leistungsmodulation erzielt.
3D morphable face models are a powerful tool in computer vision. They consist of a PCA model of face shape and colour information and allow to reconstruct a 3D face from a single 2D image. 3D morphable face models are used for 3D head pose estimation, face analysis, face recognition, and, more recently, facial landmark detection and tracking. However, they are not as widely used as 2D methods - the process of building and using a 3D model is much more involved.
In this paper, we present the Surrey Face Model, a multi resolution 3D morphable model that we make available to the public for non-commercial purposes. The model contains different mesh resolution levels and landmark point annotations as well as metadata for texture remapping. Accompanying the model is a lightweight open-source C++ library designed with simplicity and ease of integration as its foremost goals. In addition to basic functionality, it contains pose estimation and face frontalisation algorithms. With the tools presented in this paper, we aim to close two gaps. First, by offering different model resolution levels and fast fitting functionality, we enable the use of a 3D Morphable Model in time-critical applications like tracking. Second, the software library makes it easy for the community to adopt the 3D morphable face model in their research, and it offers a public place for collaboration.
We present a fully automatic approach to real-time 3D face reconstruction from monocular in-the-wild videos. With the use of a cascaded-regressor-based face tracking and a 3D morphable face model shape fitting, we obtain a semidense 3D face shape. We further use the texture information from multiple frames to build a holistic 3D face representation from the video footage. Our system is able to capture facial expressions and does not require any person specific training. We demonstrate the robustness of our approach on the challenging 300 Videos in the Wild (300- VW) dataset. Our real-time fitting framework is available as an open-source library at http://4dface.org.
A high-voltage replica based current sensor is presented, along with challenges and design techniques which are rarely discussed in literature so far. The performance is evaluated by detailed small signal and large signal analysis. By dedicated placing of high-voltage cascode devices, while keeping as many low-voltage devices as possible, a high gain-bandwidth product is achieved. A decoupling and biasing circuit is introduced which improves the response time of the current sensor at on/off transitions by a factor of five. The current sensor is implemented in a 180nm HV BiCMOS technology. The sensor achieves a DC loop gain of 83 dB and a gain-bandwidth product of 7 MHz. With the proposed techniques, the gain-bandwidth product is increased by a factor of six. The measurable current range is between 60mA and 1.5 A. The performance is demonstrated in a 500 kHz buck converter at an input voltage of 40V. The overall circuit concept is suitable for 100V and beyond, enabling high performance power management designs including switched mode power supplies and motor applications.
Nowadays CHP units are discussed for the production of electricity on demand rather than for generation of heat providing electricity as a by-product. By this means, CHP units are capable of satisfying a higher share of the electricity demand on-site and in this new role, CHP units are able to reduce the load on the power grid and to compensate for high fluctuations of solar and wind power.
Evidently, a novel control strategy for CHP units is required in order to shift the operation oriented at the heat demand to an operation led by the electricity demand. Nevertheless, the heat generated by the CHP unit needs to be utilized completely in any case, for maintaining energy as well as economic efficiency. Such a strategy has been developed at Reutlingen University, and it will be presented in the paper. Part of the strategy is an intelligent management for the thermal energy storage (TES) ensuring that the storage is at low level in terms of its heat content just before an electricity demand is calling the CHP unit into operation. Moreover, a proper forecast of both, heat and electricity demand, is incorporated and the requirements of the CHP unit in terms of maintenance and lifetime are considered by limiting the number of starts and stops per unit time and by maintaining a certain minimum length of the operation intervals.
All aspects of this novel control strategy are revealed in the paper, which has been implemented on a controller for further testing at two sites in the field. Results from these tests are given as well as results from a simulation model, which is able to evaluate the performance of the control strategy for an entire year.