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A single-phase fixed-frequency operated power factor correction circuit with reduced switching losses is proposed. The circuit uses the combination of a boost converter with an added clamp-switch, a pulse wave shaping circuit, and a standard control IC to discharge the transistor's output capacitance prior to its turn-on. In this way, a very low-complexity control circuit implementation to reduce switching losses or even achieve complete zero-voltage switching without additional sensors is possible. Moreover, this operation method is achieved at a constant switching frequency, possibly simplifying the design of the EMI filter and the converter's inductor. Experimental test results for a 100 W prototype converter are presented to validate the feasibility of the proposed operating method and corresponding circuit structure.
A single stage dual active half-bridge single phase solid-state transformer with wide input-range
(2024)
This article proposes a single-phase solid-state transformer with a wide input range. The converter is based on a direct ac/ac dual-active half-bridge topology utilizing four-quadrant switches. A two-mode control concept, combining a phase-shift modulation with a new variable dead time modulation, is proposed to control the output voltage over a varying input voltage and load range. Due to the presented variable dead time modulation concept, the step-down capability can be expanded. Combining the control principle with the topology leads to a very low-complexity system design. The converter structure and operating principle are described and analyzed in detail. Simulation results and measurements on a 600 W prototype, using SiC cascode FETs switching at 250 kHz, with an ac input voltage varying from 120 V to 400 V, verify the proposed concept.
This article proposes a digital dithering phase shift modulator to control power electronic converters. The presented modulator allows a higher resolution for digitally generated phase-shift signals without the need for fine time steps using very high-frequency or high-resolution timers. To achieve this, two coarse, counter-based phase-shift signals that differ in their phase shift values by one bit are used, and a total phase-shift output signal is derived by periodically switching between these two. The result is a dithered phase-shift control signal with an increased switching frequency or resolution. A prototype circuit for the control signal generation for a dual-active half-bridge converter is presented. Using only a 48 MHz digital clock signal, a control signal with a switching frequency of 188 kHz and a resolution of 12 bits is achieved. The modulation concept is described, and its application is verified using simulations and experimental tests.
This article proposes several modified quasi Z-source dc/dc boost converters. These can achieve soft-switching by using a clamp-switch network comprised of an active switch and a diode in parallel with a capacitor connected across one of the inductors of the Z-source network. In this way, ringing at the transistor switching node is mitigated, and the voltage at the turn-on of the transistor is reduced. Even a zero voltage switching (ZVS) of the main transistor is possible if the capacitor in the clamp-switch network is adequately chosen. The proposed circuit structure and operating mode are described and validated through simulations and measurements on a low-power prototype.
SiC power modules are crucial in the automotive industry due to their high efficiency, but the change from Si to SiC brings new challenges regarding the short-circuit withstand time (SCWT). This paper investigates the influence of a common source feedback gate topology on short-circuit behavior. Implementing source feedback enhances the short-circuit withstand time but comes at the cost of increased switching losses. A more balanced trade-off between robustness and performance can be achieved by combining a welldefined common source feedback with an increasing gate-source voltage. This article investigates the concept using simulations, followed by characterization tests on a prototype commutation cell.
Layout parasitics have a significant influence on the switching performance of wide bandgap semiconductors. Thus, a closer investigation of the layout is worthwhile. Typically, layout procedures only focus on reducing the parasitic inductance. In contrast, the current paper proposes two commutation loop layouts for GaN devices, that additionally considers the parasitic layout capacitances. For gallium nitride (GaN) devices, the device capacitance can be of the same order of magnitude as the parasitic layout capacitance. The proposed layouts result in lower switching losses compared to standard layouts by up to 20 %. The degrees of freedom for the designer are illustrated based on a parametric study. The parasitic layout components are extracted using finite element method (FEM) simulations, and the switching losses are estimated using circuit-level simulation.
Inductors are critical components in power electronic converters, determining their efficiency and size. A converter's performance is limited by the losses associated with inductors. In lower power applications, commercially available off-the-shelf inductors are usually used, but their losses are often difficult to predict solely based on datasheet values. Therefore, a direct measurement is typically required; here, a separate measurement of the dc and an ac loss is proposed to simplify the measurement process. This paper presents a low-cost setup based on affordable equipment, such as a self-built current probe, and uses simple compensation methods that allow developers to efficiently and cost-effectively measure losses in inductors. The setup is designed to emulate conditions comparable to real-world applications. The proposed procedure and setup are validated through experimental results, and potential sources of error and methods for compensation are discussed.
This article presents a single-phase, single-stage unidirectional inverter derived from a non-inverting buck-boost dc/dc converter combined with a full bridge unfolder circuit. Three different operating modes to achieve zero-voltage switching (ZVS) are discussed and evaluated against each other, demonstrating the feasibility of a soft-switching operation for this converter. The circuit structure and operating principles are discussed in detail. A modular 400 W prototype utilizing GaN devices switching at 500 kHz was built to verify the design, using an input dc voltage range of 100 V to 400 V and delivering an ac output voltage of 230 V at 50 Hz.
A circuit structure and operating method for achieving a soft-switching operation of a non-inverting buck-boost converter is proposed. The converter is derived from the two-switch buck-boost converter. It achieves ZVS by replacing a diode with an active switch, driven with a gate signal complementary to the main transistors’ control signals. In this way, the inductor current can be clamped and used to achieve soft-switching transitions of all transistors in the converter. The circuit achieves ZVS by design, and the ZVS range can be adjusted by adding a capacitor parallel to a diode or switch. The converter does not need a complex control or sensor circuit for proper operation. The operating principle and converter design are described in detail. The proposed converter operation is verified using simulations and experimental results.
