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This paper introduces a highly scalable heteromodular origami art technique for constructing 3D framework structures using elementary struts and connectors folded from uncut sheets of standard A4 office paper. The presented technique, named ZEBRA, allows the design of meter-scale architectural objects, such as truss bridges and towers, which are capable of bearing substantial mechanical loads. Moving parts, ranging from simple levers to complete multi-bar linkages, can be integrated into static frameworks using a set of kinematic extensions. An overview is given of how the ZEBRA system can be used to teach university students various theoretical and practical aspects of the engineering sciences in an entertaining and hands-on way.
Nowadays robust, energy-efficient multisensor microsystems often come with heavily restricted power budgets and the characteristic of remaining in certain states for a longer period of time. During this time frame there is no continuous clock signal required which gives the opportunity to suspend the clock until a new transition is requested. In this paper, we present a new topology for on-demand locally clocked finite state machines. The architecture combines a local adaptive clocking approach with synchronous and asynchronous components forming a quasi synchronous system. Using adaptive and local clocking comes with the advantages of reducing the power consumption while saving design effort when no global clock tree is needed. Combining synchronous and asynchronous components is beneficial compared to previous fully asynchronous approaches concerning the design restrictions. The developed topology is verified by the implementation and simulation of a temperature-ADC sensor system realized in a 180 nm process.
A fully passive RFID temperature sensor SoC with an accuracy of ±0.4°C (3σ) from 0°C to 125°C
(2018)
This paper presents a fully passive 13.56 MHz RFID temperature sensor system-on-chip. Its power management unit (PMU) operates over a large temperature range using a zero temperature coefficient (TC) bias source. On-chip temperature sensing is accomplished with low voltage, low power CMOS circuitry and time-domain signal processing. Two operating modes have been defined to study supply noise sensitivity: command mode and listening mode, which represent sensor operation during RFID command transfer and listening, respectively. Besides a standard readout command, a customized serial readout command is utilized to distinguish the data from both modes. In command mode, the sensor suffers from interference from the RFID command packet and outputs interference as well, while the sensor outputs no interference in listening mode. Measurements show that sensor resolution in listening mode is improved by a factor of approximately 16 compared to command mode. The chip was fabricated in a standard 0.35 µm CMOS technology and chip-on-board mounted to a tuned RFID transponder coil on an aluminium core FRA4 PCB substrate. Real-time wireless temperature sensing has been demonstrated with a commercial HF RFID reader. With a two-point calibration, the SoC achiesves a 3σ sensing accuracy of ±0.4°C from 0° C to 125° C.
Reduction of power consumption of digital systems is a major concern especially in modern smart sensor systems. These systems are often only activated on request and their power consumption is therefore dominated by the idle-mode. Power reduction mechanisms such as clock or power gating reduce the activity or leakage in the purely digital circuits. We propose a novel adaptive clocking scheme that optimizes the energy demand using a fine-grained oscillator control on cycle-level. To evaluate our new approach, we analytically analyze the power consumption of the regarded system in comparison with available methods. The power of our new adaptive clocking is shown in an integrated smart sensor for capacitive measurements working in a passive wireless sensor node. Using our methods, we show that the energy demand of the example system is reduced even in the case of continuous measurements that demand for a high activity in the digital circuitry.