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This article proposes several modified quasi Z-source dc/dc boost converters. These can achieve soft-switching by using a clamp-switch network comprised of an active switch and a diode in parallel with a capacitor connected across one of the inductors of the Z-source network. In this way, ringing at the transistor switching node is mitigated, and the voltage at the turn-on of the transistor is reduced. Even a zero voltage switching (ZVS) of the main transistor is possible if the capacitor in the clamp-switch network is adequately chosen. The proposed circuit structure and operating mode are described and validated through simulations and measurements on a low-power prototype.
Advancing mental health diagnostics: AI-based method for depression detection in patient interviews
(2023)
In this paper, we present a novel artificial intelligence (AI) application for depression detection, using advanced transformer networks to analyse clinical interviews. By incorporating simulated data to enhance traditional datasets, we overcome limitations in data protection and privacy, consequently improving the model’s performance. Our methodology employs BERT-based models, GPT-3.5, and ChatGPT-4, demonstrating state-of-the-art results in detecting depression from linguistic patterns and contextual information that significantly outperform previous approaches. Utilising the DAIC-WOZ and Extended-DAIC datasets, our study showcases the potential of the proposed application in revolutionising mental health care through early depression detection and intervention. Empirical results from various experiments highlight the efficacy of our approach and its suitability for real-world implementation. Furthermore, we acknowledge the ethical, legal, and social implications of AI in mental health diagnostics. Ultimately, our study underscores the transformative potential of AI in mental health diagnostics, paving the way for innovative solutions that can facilitate early intervention and improve patient outcomes.
Analog integrated circuit sizing still relies heavily on human expert knowledge as previous automation approaches have not found wide-spread acceptance in industry. One strand, the optimization-based automation, is often discarded due to inflated constraining setups, infeasible results or excessive run times. To address these deficits, this work proposes a alternative optimization flow featuring a designer’s intuition for feasible design spaces through integration of expert knowledge based on the gm/ID-method. Moreover, the extensive run times of simulation-based optimization flows are overcome by incorporating computationally efficient machine learning methods. Neural network surrogate models predicting eleven performance parameters increase the evaluation speed by 3 400× on average compared to a simulator. Additionally, they enable the use of optimization algorithms dependent on automatic differentiation, that would otherwise be unavailable in this field. First, an up to 4× more efficient way for sampling training data based on the aforementioned space is detailed. After presenting the architecture and training effort regarding the surrogate models, they are employed as part of the objective function for sizing three operational amplifiers with three different optimization algorithms. Additionally, the benefits of using the gm/ID-method become evident when considering technology migration, as previously found solutions may be reused for other technologies.
Most Question-answering (QA) systems rely on training data to reach their optimal performance. However, acquiring training data for supervised systems is both time-consuming and resource-intensive. To address this, in this paper, we propose TFCSG, an unsupervised similar question retrieval approach that leverages pre-trained language models and multi-task learning. Firstly, topic keywords in question sentences are extracted sequentially based on a latent topic-filtering algorithm to construct unsupervised training corpus data. Then, the multi-task learning method is used to build the question retrieval model. There are three tasks designed. The first is a short sentence contrastive learning task. The second is the question sentence and its corresponding topic sequence similarity judgment task. The third is using question sentences to generate their corresponding topic sequence task. The three tasks are used to train the language model in parallel. Finally, similar questions are obtained by calculating the cosine similarity between sentence vectors. The comparison experiment on public question datasets that TFCSG outperforms the comparative unsupervised baseline method. And there is no need for manual marking, which greatly saves human resources.
Impact of a large distribution network on radiation characteristics of planar spiral antenna arrays
(2023)
Designing antenna arrays with a central feed point has gained ground in the antenna technique. This approach, which is usually applied because of manufacturing costs, is difficult to achieve and leads to a large feeding network. The impact of which is numerically investigated in the present work. Upon comparing three different antennas, it is shown that the enlargement of the feed strongly affects the antenna's overall dimensions and the antenna's radiation characteristics. The antenna with the plug-in solution is not only small in size but also performs better compared to antennas with a central feed point. Considering the high effort in designing the feed network with a central point and the influence of the resulting enlarged network on the dimensions and radiation characteristics of the antenna, the cost saving in production can be put into perspective.
We present the results of an extensive characterization of the performance and stability of a third-order continuous-time delta-sigma modulator with active coefficient error compensation. Using our previously published coefficient tuning technique, process variation induced R-C time-constant (TC) errors in the forward signal path can be compensated indirectly using continuously tunable DACs in the feedback path. To validate our technique experimentally with a range of real TC variations, we designed a modulator with discretely configurable integration capacitor arrays in a 0.35-μm CMOS process. We configured the capacitors of the fabricated device for a range of total TC variations from -28.4 % to +19.3 % and measured the signal-to-noise ratio (SNR) as a function of the input amplitude before and after compensating the variations electrically using the feedback DACs. The results show that our tuning technique is capable of restoring the desired nominal modulator performance over the entire parameter variation range, including the system’s nominal maximum stable amplitude (MSA).
Modern wide bandgap power devices promise higher power conversion performance if the device can be operated reliably. As switching speed increases, the effects of parasitic ringing become more prominent, causing potentially damaging overvoltages during device turn-off. Estimating the expected additional voltage caused by such ringing enables more reliable designs. In this paper, we present an analytical expression to calculate the expected overvoltage caused by parasitic ringing based on parasitic element values and operating point parameters. Simulations and measurements confirm that the expression can be used to find the smallest rise time of the switches’ drain-source voltage for minimum overvoltage. The given expression also allows the prediction of the trade off overvoltage amplitude in case of faster required rise times.
We propose a novel technique to compensate the effects of R-C / gm-C time-constant (TC) errors due to process variation in continuous-time delta-sigma modulators. Local TC error compensation factors are shifted around in the modulator loop to positions where they can be implemented efficiently with tunable circuit structures, such as current-steering digital-to-analog converters (DAC). This approach constitutes an alternative or supplement to existing compensation techniques, including capacitor or gm tuning. We apply the proposed technique to a third-order, single-bit, low-pass continuous-time delta-sigma modulator in cascaded integrator feedback structure. A feedback path tuning scheme is derived analytically and confirmed numerically using behavioral simulations. The modulator circuit was implemented in a 0.35-μm CMOS process using an active feedback coefficient tuning structure based on current-steering DACs. Post-layout simulations show that with this tuning structure, constant performance and stable operation can be obtained over a wide range of TC variation.
This paper presents a toolbox in Matlab/Octave for procedural design of analog integrated circuits. The toolbox contains all native functions required by analog designers (namely, schematic-generation, simulation setup and execution, integrated look-up tables and functions for design space exploration) to capture an entire design strategy in an executable script. This script - which we call an Expert Design Plan (EDP) - is capable of executing an analog circuit design fully automatically. The toolbox is integrated in an existing design flow. A bandgap reference voltage circuit is designed with this tool in less than 15 min.
A single-phase fixed-frequency operated power factor correction circuit with reduced switching losses is proposed. The circuit uses the combination of a boost converter with an added clamp-switch, a pulse wave shaping circuit, and a standard control IC to discharge the transistor's output capacitance prior to its turn-on. In this way, a very low-complexity control circuit implementation to reduce switching losses or even achieve complete zero-voltage switching without additional sensors is possible. Moreover, this operation method is achieved at a constant switching frequency, possibly simplifying the design of the EMI filter and the converter's inductor. Experimental test results for a 100 W prototype converter are presented to validate the feasibility of the proposed operating method and corresponding circuit structure.
This paper presents a compact four-arm spiral antenna, which may be used in direction-finding applications but also mobile communication systems. The antenna is fed sequentially at its outside-ends using a sequential phase network embedded in grounded multilayer dielectric media. Sequential rotation is applied to generate the axial mode M1 but also the conical mode M2 in the same frequency band. The antenna exhibits good radiation characteristics in the frequency band of interest.
On the influence of ground and substrate on the radiation characteristics of planar spiral antennas
(2022)
The unidirectional radiation of spiral antennas mounted on a substrate requires the presence of a ground plane. In this work, we successively illustrate the impact of dielectric material and ground plane on the key metrics of a planar equiangular spiral antenna (PESA). For this purpose, a PESA mounted on several substrates with different dielectric properties and thicknesses is modeled and simulated. We introduce the tertiary current flowing on spiral arms when backed by a ground plane.
The majority of people in sub-Saharan Africa (SSA) rely on so-called “paratransit” for their mobility needs. The term refers to a large informal transport sector that runs independent of government, of which 83% comprises minibus taxis (MBT). MBT technology is often old and contribute significantly to climate change with their high carbon dioxide (CO2) emissions. Issues related to sustainability and climate change are becoming more important world-wide and hardly any attention is given to MBTs. Converting the MBTs from internal combustion engines (ICEs) to electric motors could be a possible solution. The existing power grid in SSA is largely based on fossil power plants and is unstable. This can be seen by frequent local power blackouts. To avoid further strain on the existing power grid, it would therefore make sense to charge the electric minibus taxis (eMBTs) through a grid consisting of renewable energies. A mobility map is created via simulations with collected data points of the MBTs. By using this mobility map, the energy demand of the eMBTs is calculated. Furthermore, a region-specific photovoltaic (PV) and wind simulation can be realised based on existing weather data, and a tool to size the supply system to charge the eMBTs is developed after all data has been collected. With the help of this work, it can be determined to what extent renewable energies such as PV and wind power can be used to support the transition from ICEs to electric engines in the MBT sector.
In this work, a brushless, harmonic-excited wound-rotor synchronous machine without any auxiliary windings which can provide full torque at startup is investigated experimentally. The excitation power is transferred inductively by superimposing an additional harmonic field of different pole-pair number on top of the airgap field. This is achieved by feeding the parallel paths of the stator and rotor winding separately. A prototype for the harmonic-excited synchronous machine has been constructed and experimental results are presented to verify the concept. The main loss contributors are identified and the importance of considering core losses under harmonic excitation is discussed. A general analytical model for harmonic excited synchronous machines is proposed which enables a quick estimation of the iron core flux densities and the core losses generated by the additional harmonic currents.
Verification of an active time constant tuning technique for continuous-time delta-sigma modulators
(2022)
In this work we present a technique to compensate the effects of R-C / g m -C time-constant (TC) errors due to process variation in continuous-time delta-sigma modulators. Local TC error compensation factors are shifted around in the modulator loop to positions where they can be implemented efficiently with finely tunable circuit structures, such as current-steering digital-to-analog converters (DAC). We apply our technique to a third-order, single-bit, low-pass continuous-time delta-sigma modulator in cascaded integrator feedback structure, implemented in a 0.35-μm CMOS process. A tuning scheme for the reference currents of the feedback DACs is derived as a function of the individual TC errors and verified by circuit simulations. We confirm the tuning technique experimentally on the fabricated circuit over a TC parameter variation range of ±20%. Stable modulator operation is achieved for all parameter sets. The measured performances satisfy the expectations from our theoretical calculations and circuit-level simulations.
This paper illustrates the implementation of series connected hardware modules as part of a scalable and modular power electronics device, which is ideally suited in the field of electric vehicles using wide bandgap semiconductor devices. The main benefit of the modular concept is that different current or voltage requirements can be satisfied based on the appropriate series or parallel connection of single modules. The particular design is based on the fact that the single modules generate a continuous and specified output voltage from a given dc voltage. The current work focuses on a brief classification of this work in different series connected concepts of power converters and in particular on an active damping approach for the series connected LC output filters based on inductor current feedback.
This contribution presents a three-phase power stage for motor control with continuous output voltages using wide bandgap semiconductors and an asynchronous delta-sigma based switching signal generation. The focus of the paper is on an active damping approach for the LC output filter based on inductor current feedback.
This paper presents a permanent magnet tubular linear generator system for powering passive sensors using vertical vibration harvesting energy. The system consists of a permanent magnet tubular linear vibration generator and electric circuits. By using the design of mechanical resonant movers, the generator is capable of converting low frequencies small amplitude vertical vibration energy into more regular sinusoidal electrical energy. The distribution of the magnetic field and electromotive force are calculated by Finite Element Analysis. The characteristics of the linear vibration generator system are observed. The experimental results show the generator can produce about 0.4W~1.6W electrical power when the vibration source's amplitude is fixed on 2mm and the frequencies are between 13Hz and 22Hz.
In this work, a comparison between different brushless harmonic-excited wound-rotor synchronous machines is performed. The general idea of all topologies is the elimination of the slip rings and auxiliary windings by using the already existing stator and rotor winding for field excitation. This is achieved by injecting a harmonic airgap field with the help of power electronics. This harmonic field does not interact with the fundamental field, it just transfers the excitation power across the airgap. Alternative methods with varying number of phases, different pole-pair combinations, and winding layouts are covered and compared with a detailed Finite-Element-parameterized model. Parasitic effects due to saturation and coupling between the harmonic and main windings are considered.
Steady state efficiency optimization techniques for induction motors are state of the art and various methods have already been developed. This paper provides new insights in the efficiency optimized operation in dynamic regime. The paper proposes an anticipative flux modification in order to decrease losses during torque and speed transients. These trajectories are analyzed based on a numerical study for different motors. Measurement results for one motor are given as well.
Energy efficient electric control of drives is more and more important for electric mobility and manufacturing industries. Online dynamic optimization of induction machines is challenging due to the computational complexity involved and the variable power losses during dynamic operation of induction machines. This paper proposes a simple technique for sub-optimal online loss optimization using rotor flux linkage templates for energy efficient dynamic operation of induction machines. Such a rotor flux linkage template is given by a rotor flux linkage trajectory which is optimal for a specific scenario. This template is calculated in an offline optimization process. For a specific scenario during real time operation the rotor flux linkage is calculated by appropriately scaling the given template.
In this work, a brushless, harmonic-excited wound-rotor synchronous machine is investigated which utilizes special stator and rotor windings. The windings magnetically decouple the fundamental torque-producing field from the harmonic field required for the inductive power transfer to the field coil. In contrast to conventional harmonic-excited synchronous machines, the whole winding is utilized for both torque production and harmonic excitation such that no additional copper for auxiliary windings is needed. Different rotor topologies using rotating power electronic components are investigated and their efficiencies have been compared based on Finite-Element calculation and circuit analysis.
The design process for a single phase, smart, universal charger for light electric vehicles, is presented. With a step up, power factor correction circuit, followed by a phase shifted, full bridge converter, with synchronous rectification on the secondary side. Due to the resistor-capacitor-diode snubber on the secondary side, the current peak at the start of power transfer, leads to false triggering during light load control with peak current mode control. The solution developed for light loads, is to change from peak current control to voltage control. This is achieved by limiting the maximum phase shift, instead of changing the reference value. For the power factor correction stage, measured and calculated efficiencies are compared as a function of the output power. The voltage and current waveforms are shown for the power factor correction circuit, and for the phase shifted bridge, the measured current waveform is compared with simulation.
We present a compact battery charger topology for weight and cost sensitive applications with an average output current of 9A targeted for 36V batteries commonly found in electric bicycles. Instead of using a conventional boost converter with large DC-link capacitors, we accomplish PFC-functionality by shaping the charging current into a sin²-shape. In addition, a novel control scheme without input-current sensing is introduced. A-priori knowledge is used to implement a feed-forward control in combination with a closed-loop output current control to maintain the target current. The use of a full-bridge/half bridge LLC converter enables operation in a wide input-voltage range.
A fully featured prototype has been built with a peak output power of 1050W. An average output power of 400W was measured, resulting in a power density of 1.8 kW/dm³. At 9A charging current, a power factor of 0.96 was measured and the efficiency exceeds 93% on average with passive rectification.
The impact of pulse charging has been evaluated on a 400Wh battery which was charged with the proposed converter as well as CC-CV-charging for reference. Both charging schemes show similar battery surface temperatures.
We propose a method for recognizing dynamic gestures using a 3D sensor. New aspects of the developed system include problem-adapted data conversion and compression as well as automatic detection of different variants of the same gesture via clustering with a suitable metric inspired by Jaccard metric. The combination of Hidden Markov Models and clustering leads to robust detection of different executions based on a small set of training data. We achieved an increase of 5% recognition rate compared to regular Hidden Markov Models. The system has been used for human-machine interaction and might serve as an assistive system in physiotherapy and neurological or orthopedic diagnosis.
The complexity of supply chains increases, especially due to the geographical spread of supplier and customer networks. In the connected and automated supply chains of the industry 4.0, even more nodes are incorporated in supply chains. This paper discusses the possible improvement of process quality in the industry 4.0 through the different blockchain and distributed ledger technologies. We derived hypotheses from a literature review and asked German blockchain experts from the industry to validate and discuss the hypotheses. We find that the different blockchain technologies and consensus algorithms have different strength with regard to quality improvement. One central finding is that IOTA, developed especially for the IoT and deemed the ’next evolutionary step’ is scalable and hence may increase the process efficiency, but at the same time is more vulnerable than other blockchain implementations, which again may reduce the overall process quality.
Nowadays, the demand for a MEMS development/design kit (MDK) is even more in focus than ever before. In order to achieve a high quality and cost effectiveness in the development process for automotive and consumer applications, an advanced design flow for the MEMS (micro electro mechanical systems) element is urgently required. In this paper, such a development methodology and flow for parasitic extraction of active semiconductor devices is presented. The methodology considers geometrical extraction and links the electrically active pn junctions to SPICE standard library models and subsequently extracts the netlist. An example for a typical pressure sensor is presented and discussed. Finally, the results of the parasitic extraction are compared with fabricated devices in terms of accuracy and capability.
In this paper, we address the novel EDP (Expert Design Plan) principle for procedural design automation of analog integrated circuits, which captures the knowledge-based design strategy of human circuit designers in an executable script, making it reusable. We present the EDP Player, which enables the creation and execution of EDPs for arbitrary circuits in the Cadence® Virtuoso® Design Environment. The tool provides a generic version of an instruction set, called EDPL (EDPLanguage), enabling emulation of a typical manual analog sizing flow. To automate the design of a Miller Operational Amplifier and to create variants of a Smart Power IC, several EDPs were implemented using this tool. Employing these EDPs leads to a strong reduction of design time without compromising design quality or reliability.
A novel brushless excitation concept for synchronous machines with a rotating power converter is proposed in this paper. The concept does not need an auxiliary winding or any other modification to the machine structure apart from an inverter with a DC link capacitor and a controller on the rotor. The power required for the rotor excitation is provided by injecting harmonics into the stator winding. Thus, a voltage in the field coil is induced. The rotor inverter is controlled such that the alternating current charges the DC link capacitor. At the same time the inverter supplies the DC field current to the field coil. The excitation concept is first developed in theory, then presented using an analytical model and FEA, and lastly investigated with a prelimininary experimental setup.
In this work design rules for a novel brushless excitation system for externally excited synchronous machines are discussed. The concept replaces slip rings with a fullbridge active rectifier and a controller mounted on the rotor. An AC signal induced from the stator is used to charge the rotor DC link. The DC current for the rotor excitation is provided from this DC link source. Finite element analysis of an existing machine is used to analyze the practicability of the excitation system.
This paper discusses the optimal control problem for increasing the energy efficiency of induction machines in dynamic operation including field weakening regime. In an offline procedure optimal current and flux trajectories are determined such that the copper losses are minimized during transient operations. These trajectories are useful for a subsequent online implementation.
This paper presents an approach for the implementation of a modular and scalable power electronics device for controlling electric drives in the field of electric vehicles using wide bandgap semiconductor devices. The main idea is to achieve the required output currents or voltages by connecting adequately designed hardware modules in parallel or in series. This particular design is based on the fact that the single modules generate a continuous and specified output voltage from a given dc voltage, e.g. an intermediate circuit or battery voltage. The main benefit is, that different current or voltage requirements can be satisfied based on a single module thus decreasing development and production costs. The current paper focuses on the connection in parallel of such modules. A control architecture is illustrated and a first proof of concept is given.
The Dual Active Bridge (DAB) is a very promising topology for future power converters. However, careless operation can lead to a DC component in the transformer current. The problem is further exacerbated when the phase shift changes during operation. This work presents a study of DC bias effects on the DAB with special regard to transient effects introduced by sudden shifts in the output load. We present a simple yet effective approach to avoid DC bias entirely.
Improved inductive feed-forward for fast turn-on of power semiconductors during hard switching
(2019)
A transformer is used to increase the gate voltage during turn-on, thus reducing the necessary bias voltage of the gate driver. Counteracting the voltage dependency of the gate capacitance of high-voltage power devices, faster transitions are possible. The additional transformer only slighly increases the over-voltage during turn-off.
Novel design for a coreless printed circuit board transformer realizing high bandwidth and coupling
(2019)
Rogowski coils offer galvanic isolation and can measure alternating currents with a high bandwidth. Coreless printed circuit board (PCB) transformers have been used as an alternative to limit the additional stray inductance if a Rogowski coil can not be attached to the circuit. A new PCB transformer layout is proposed to reduce cost, decrease additional stray inductance, increase the bandwidth of current measurements and simplify the integration into existing designs.
Boost converters suffer from a bandwidth limitation caused by the right-half plane zero (RHPZ), which occurs in the control-to-output transfer function. In contrast, there are many applications that require superior dynamic behavior. Further, size and cost of boost converter systems can be minimized by reduced voltage deviations and fast transient responses in case of large signal load transients. The key idea of the proposed ΔV/Δt-intervention control concept is to adapt the controller output to its new steady state value immediately after a load transient by prediction from known parameters. The concept is implemented in a digital control circuit, consisting of an ASIC in a 110 nm-technology and a Xilinx Spartan-6 field programmable gate array (FPGA). In a boost converter with 3.5V input voltage, 6.3V output voltage, 1.2A load, and 500 kHz switching frequency, the output voltage deviations are 2.8x smaller, scaling down the output capacitor value by the same factor. The recovery times are 2.4x shorter in case of large signal load transients with the proposed concept. The control is widely applicable, as it supports constant switching frequencies and allows for duty cycle and inductor current limitations. It also shows various advantages compared to conventional control and to selected adaptive control concepts.
Due to their superior fast-switching performance, GaN transistors show enormous potential to enable compact power electronics in applications like renewable energy, electrical cars and home appliances by shrinking down the size of passives. However, fast switching poses challenges for the gate driver. Since GaN transistors have a low threshold voltage Vt of ~1V, an unintended driver turn-on can occur in case of a unipolar gate control as shown for a typical half-bridge in Fig. 24.2.1 (top left). This is due to coupling via the gate-drain capacitance (Miller coupling), when the low-side driver turns on, causing a peak current into the gate. This is usually tackled by applying a negative gate voltage to enhance the safety margin towards Vt, resulting in a bipolar gate-driving scheme. In many power-electronics applications GaN transistors operate in reverse conduction, carrying the inductor current during the dead time t, when the high-side and low-side switch are off (as illustrated at a high-side switch in Fig. 24.2.1, bottom left). As there is no real body diode as in silicon devices, the GaN transistor turns on in reverse operation with a voltage drop VF across the drain-source terminals (quasi-body diode behavior). As a negative gate voltage adds to VF, 63% higher reverse-conduction losses were measured for a typical GaN switch in bipolar gate-drive operation. This drawback is addressed by a three-level gate voltage (positive, 0V, negative), which at the same time provides robustness against unintended turn-on similar to the bipolar gate driver, proven in [1] for a discrete driver.
A wide-bandwidth galvanically isolated current sensing circuit with an integrated Rogowski coil in 180nm CMOS is presented. Exploiting the high-frequency properties of an optimized on-chip Rogowski coil, currents can be measured up to a bandwidth of 75 MHz. The analog sensor front-end comprises a two-stage integrator, which allows a chopper frequency below signal bandwidth, resulting in 2.2 mVrms output noise. An additional integrated Hall sensor extends the measurement range towards DC.
The level shifter and the floating gate supply for high-side transistors are a major challenge in high-voltage DCDC converters. This paper presents a high speed and power-efficient level shifter for voltages of up to 50V, suitable for both PMOS and NMOS power FETs. A switching node falling edge detection allows both, a sensitive and safe signal detection. This enables a robust operation during steep dv / dt transitions and a power consumption as low as 4.1 pJ per switching cycle, which is a reduction of more than 40% compared to prior art. An active clamping circuit prevents common mode displacement currents into the high-side supply. The level shifter is implemented in a 180nm BiCMOS technology. Measurements confirm a 50V 120MHz high-speed operation of the level shifter with a rising / falling propagation delay of 1.45 ns / 1.3 ns, respectively. The dv / dt robustness has been confirmed by measurements for transitions up to 6V/ ns.
This paper presents a digitally controlled boost converter IC for high output voltage and fast transient applications. Thus, it is well applicable in automotive and industrial environments. The 3V-to-6V input voltage, 6.3V output voltage, 1A boost converter IC is fabricated in a 180nm BCD technology. Digital control enables cost savings, advanced control concepts, and it is less parameter sensitive compared to common analog control. A 90 ns latency, 6-bit delay line ADC operates with a window concept, meeting high resolution requirements, e.g. in car battery applications. An output voltage live tracking is included for extending the ADC conversion window. A charge pump DAC provides high resolution, monotonicity, and short 128 ns conversion time. Further, a standard digital PI controller is enhanced by a simple but effective ΔV/Δt-intervention control. It results in 2.8x reduced output voltage deviations in case of load steps, scaling down the output capacitor value by the same factor.
A fully passive RFID temperature sensor SoC with an accuracy of ±0.4°C (3σ) from 0°C to 125°C
(2018)
This paper presents a fully passive 13.56 MHz RFID temperature sensor system-on-chip. Its power management unit (PMU) operates over a large temperature range using a zero temperature coefficient (TC) bias source. On-chip temperature sensing is accomplished with low voltage, low power CMOS circuitry and time-domain signal processing. Two operating modes have been defined to study supply noise sensitivity: command mode and listening mode, which represent sensor operation during RFID command transfer and listening, respectively. Besides a standard readout command, a customized serial readout command is utilized to distinguish the data from both modes. In command mode, the sensor suffers from interference from the RFID command packet and outputs interference as well, while the sensor outputs no interference in listening mode. Measurements show that sensor resolution in listening mode is improved by a factor of approximately 16 compared to command mode. The chip was fabricated in a standard 0.35 µm CMOS technology and chip-on-board mounted to a tuned RFID transponder coil on an aluminium core FRA4 PCB substrate. Real-time wireless temperature sensing has been demonstrated with a commercial HF RFID reader. With a two-point calibration, the SoC achiesves a 3σ sensing accuracy of ±0.4°C from 0° C to 125° C.
Micro grids often consist of energy generators, storages and consumers with controllers which are not prepared for their integration into communication networks for energy systems. In this paper it will be presented, how standards from the field of energy automation can be applied in such controllers. The data for communication interfaces can be structured according to the IEC 61850- or the VHPREADY standard. It is investigated which requirements must be supported to implement such data models within the controllers. For the transmission of the data we propose the OPC UA protocol, which supports extensive security measures and which is today available for nearly all modern types of controllers and computers.
A simple determination of the error voltage compensation map for motor parameter identification
(2018)
This paper proposes a new method for determining the error voltage compensation map in a parameter identification procedure of three-phase induction motors with an inverter. The compensation curve depending on the motor current is determined using a simple procedure based on given reference voltage steps and the corresponding steady state values of the stator current of the induction motor.
The hotspot detection has received much attention in the recent years due to a substantial mismatch between lithography wavelength and semiconductor technology feature size. This mismatch causes diffraction when transferring the layout from design onto a silicon wafer. As a result, open or short circuits (i.e. lithography hotspots) are more likely to be produced. Additionally, increasing numbers of semiconductors devices on a wafer required more time for the lithography hotspot detection analysis. In this work, we propose a fast and accurate solution based on novel artificial neural network (ANN) architecture for precise lithography hotspot detection using a convolution neural network (CNN) adopting a state of-the-art technique. The experimental results showed that the proposed model gained accuracy improvement over current state-of-theart approaches. The final code has been made publicly available.
Many GaN power transistors contain a PN junction between gate and the channel region close to the source. In order to maintain the on-state, current must continuously be supplied to the junction. Therefore, the commonly recommended approach uses a gate bias voltage of 12V to compensate the Miller current through a boost circuit. For the same purpose, a novel gate driving method based on an inductive feed forward has been presented. With this, stable turn-on can be achieved even for a bias voltage of only 5V. The effectiveness of this concept is demonstrated by double pulse measurements, switching currents up to 27A and a voltage of 400V. For both approaches a compact design with low source inductance is characterized. In addition to the significant reduction of the gate bias voltage and peak gate current, the new approach reduces the switching losses for load currents >23 A.
We present a dual active bridge topology suitable for wide voltage range applications covering all combinations of 200V to 600V on the input and 20V to 60V on the output with constant power of 1kW.We employ a stepped inductance scheme to adjust the effective inductance of the converter, thus extending the efficient operation range. Using a variable switching frequency between 35 kHz and 150 kHz with operation-point-dependent limits further increases the performance of the converter. A prototype was built and the proposed changes have been compared to a fixed frequency, fixed inductance implementation. Measurements show a maximum loss reduction of 40 %, leading to a peak efficiency of 97% while maintaining constant output power over the entire working area.
Reduction of power consumption of digital systems is a major concern especially in modern smart sensor systems. These systems are often only activated on request and their power consumption is therefore dominated by the idle-mode. Power reduction mechanisms such as clock or power gating reduce the activity or leakage in the purely digital circuits. We propose a novel adaptive clocking scheme that optimizes the energy demand using a fine-grained oscillator control on cycle-level. To evaluate our new approach, we analytically analyze the power consumption of the regarded system in comparison with available methods. The power of our new adaptive clocking is shown in an integrated smart sensor for capacitive measurements working in a passive wireless sensor node. Using our methods, we show that the energy demand of the example system is reduced even in the case of continuous measurements that demand for a high activity in the digital circuitry.