Open Access

„Bürgerrechtler klagen gegen Weitergabe von Gesundheitsdaten“ – so titelt (spiegel.de, 2022) am 29.04.2022. Dabei geht es um die Weitergabe pseudonymisierter Daten von 73 Millionen Versicherten durch die gesetzlichen Krankenkassen. Diese Daten sollen der Forschung zur Verfügung gestellt werden. Die Kläger bezweifeln, dass die Daten nicht deanonymisiert werden können. Dieses aktuelle Beispiel zeigt einen konkreten und relevanten Anwendungsfall des Themas Anonymisierung/Pseudonymisierung im aktuariellen Kontext auf. Es ist davon auszugehen, dass die Relevanz in den kommenden Jahren weiter zunehmen wird. Spätestens seit dem Inkrafttreten der DSGVO ist das Thema Datenschutz allgegenwärtig und stellt uns Aktuare vor große Herausforderungen. Europäische Initiativen zur Schaffung eines Binnenmarktes für Daten sollen zwar die Möglichkeit schaffen, Daten einfacher zu teilen und so beispielsweise Dritten für Forschungszwecke zur Verfügung zu stellen, werfen aber auch viele Fragestellungen auf. Eine naheliegende Lösung ist es, Daten zu anonymisieren oder zu pseudonymisieren. Aber was bedeutet das konkret und welche Konsequenzen ergeben sich daraus? Bis zu welchem Grad müssen Daten anonymisiert werden und welche ReIdentifikationsrisiken bestehen weiterhin?

This paper presents a toolbox in Matlab/Octave for procedural design of analog integrated circuits. The toolbox contains all native functions required by analog designers (namely, schematic-generation, simulation setup and execution, integrated look-up tables and functions for design space exploration) to capture an entire design strategy in an executable script. This script - which we call an Expert Design Plan (EDP) - is capable of executing an analog circuit design fully automatically. The toolbox is integrated in an existing design flow. A bandgap reference voltage circuit is designed with this tool in less than 15 min.

A premise guaranteeing the successful interdisciplinary teamwork in product design is a mutual understanding of both professional and academic communities of the different design expertise and the role they play in the process. It appears that the open compound word industrial design is open to interpretation in European education. This ambiguity had a negative impact on the labour policies of some European countries, which have labelled some professions with incorrect names. Therefore, this terminological inconsistency urges for clarification within the design community. This work analyses the term industrial design, it presents historical developments in European industrial design education, in particular in Germany and in the Netherlands, and discusses how the education to the industrial design profession was positioned towards product development. This paper suggests that the causes for the observed lack of clarity about the meaning of the term industrial design are of an etymological and disciplinary kind. In order to act as a bridge between the professional and academic communities, universities should create the premises for interdisciplinary collaboration between designers and engineers through standardized communication, ultimately contributing for a sustainable future in both design and engineering education.

In times of climate change and growing urbanization, the way food is produced and consumed also changes. Meanwhile, digitization is transforming farming practices, which also applies to the domestic growing of crops. More and more so-called smart home farms (SHF) are finding their way into private households. This paper conceptualizes the unique nature of enabled smart services and their underlying technology. Following an inductive interpretive approach, this study explores the antecedents of smart home farming practices. Our sample consists of eleven actual smart home farmers. We found six constructs to be of salient importance: expected outcomes related to harvesting, positive feelings, and sustainability; a combination of one's affinity for green and novel technologies; and the smartness and visibility of the enabled services. In the outlook, we present some preliminary thoughts for testing our qualitative findings.

For a long time, most discrete accelerators have been attached to host systems using various generations of the PCI Express interface. However, with its lack of support for coherency between accelerator and host caches, fine-grained interactions require frequent cache-flushes, or even the use of inefficient uncached memory regions. The Cache Coherent Interconnect for Accelerators (CCIX) was the first multi-vendor standard for enabling cache-coherent host-accelerator attachments, and already is indicative of the capabilities of upcoming standards such as Compute Express Link (CXL). In our work, we compare and contrast the use of CCIX with PCIe when interfacing an ARM-based host with two generations of CCIX-enabled FPGAs. We provide both low-level throughput and latency measurements for accesses and address translation, as well as examine an application-level use-case of using CCIX for fine-grained synchronization in an FPGA-accelerated database system. We can show that especially smaller reads from the FPGA to the host can benefit from CCIX by having roughly 33% shorter latency than PCIe. Small writes to the host have a latency roughly 32% higher than PCIe, though, since they carry a higher coherency overhead. For the database use-case, the use of CCIX allowed to maintain a constant synchronization latency even with heavy host-FPGA parallelism.